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System and Software Technologies Lead HPEC Charge

While opinions vary on the correct definition of High Performance Embedded Computing (HPEC), technology suppliers are rolling out a variety of system and software solutions that are well suited to military embedded applications.

JEFF CHILD, EDITOR-IN-CHIEF

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The true definition of High Performance Embedded Computing (HPEC) is still a bit up for grabs depending on who you talk to. But that hasn't stopped the interest level in HPEC among military system developers from ramping steadily upward. When you define HPEC as systems with highly dense arrays of GPGPUs-or as data-center level of computing based on server-class Xeon processors and all their support electronics-the desire for high levels of compute density is only increasing. There's a strong argument that an element of computing virtualization is key for HPEC platforms so that software programs function can massively parallel multiprocessing systems as if they're on a single processor.

The notion of a server-class computing solution on an embedded form factor comprises a popular baseline for what HPEC represents. An example is Mercury Systems' Ensemble HDS6603 High Density Server (Figure 1). The board is a single-slot, 6U OpenVPX (VITA 46/65) compliant module, the HDS6603 is powered by two 1.8 GHz Intel Xeon E5-2600 v3 processors (formerly codenamed "Haswell-EP"), each with 12 cores to deliver a total of 1.38 TFLOPS of general-purpose processing power. On-board Gen 3 PCIe pipes feed the module's switch fabric interconnects, which are managed by dual Mellanox ConnectX-3 devices to deliver 40 Gbit/s Ethernet or InfiniBand inter-module data rates. It is supported by up to 128 Gbytes of DDR4 system memory.

Figure 1
The Ensemble HDS6603 High Density Server is a single-slot, 6U OpenVPX (VITA 46/65) compliant module powered by two 1.8 GHz Intel Xeon E5-2600 v3 processors, each with 12 cores.

Systems and Software for HPEC

A year ago the big story in HPEC revolved around the Intel Xeon processor architecture and specifically the more embedded variant of Xeon, the Xeon-D. The Xeon-D was the company's first Xeon processor-based system-on-chip (SoC) and several vendors rolled out board-level products based on the m processor, mostly in the OpenVPX form factor. Fast forward to today and the last 12 months in HPEC have included still more Xeon and Xeon-D product roll outs, but the bigger trend has been in HPEC software and systems technologies that have emerged.

Exemplifying that trend, last Fall Curtiss-Wright Defense Solutions its OpenHPEC Initiative. The provides HPEC system integrators with access to best-of-class open architecture APIs and tools including a cluster manager, debugger, profiler, and communication and vector math libraries. At the heart of the initiative Curtiss-Wright introduced its OpenHPEC Accelerator Suite. This software development toolset is designed to include a broad and comprehensive array of open standard drivers, middleware and libraries, as well as proven solutions for cluster-wide debugging tools, performance profiling, performance reports, data flow performance analysis, and built-in-test tools, all of which have already been developed and qualified for commercial HPC use. The first elements of OpenHPEC Accelerator Suite toolset were the Allinea Software's debugging and profiling tools, DDT and MAP, Allinea Performance Reports, and Bright Computing's Cluster Manager. Additional software tool elements are expected to be announced on a regular basis.

U.S. Air Force Example

In an example of the OpenHPEC Accelerator Suite in action, Curtiss-Wright back in March released the successful results of its participation in the US Air Force (USAF)-led Next Generation Radar (NGR) Processor Study. Curtiss-Wright demonstrated that its proposed multiprocessor HPEC Radar processing architecture, based on demanding specifications and requirements provided by the USAF, has met the study's target benchmarks. The goal of the study was to assess the capability of cost-effective COTS hardware and software to perform airborne radar signal processing.

Curtiss-Wright ran and optimized the study's SAR (Synthetic Aperture Radar) and GMTI (Ground Moving Target Indicator) benchmarks on a solution comprised of its OpenHPEC Accelerator Suite development tools, five OpenVPX DSP modules and a 40 Gbps OpenVPX Ethernet switch module. According to Curtiss Wright, the test results are available to customers following request to the factory. The results showed that standard conduction-cooled OpenVPX modules can be used to satisfy the performance requirements to support the synthetic aperture radar (SAR) and ground moving target indicator (GMTI) benchmarks in the most demanding USAF environments.

Suited for SAR and GMTI

A recent product from Abaco Systems also aims at SAR and GMTI requirements. Last month Abaco Systems announced its DSP282A 6U OpenVPX rugged multiprocessor with 40 Gbit Ethernet. The DSP282A is designed to fulfil the requirements of very large radar systems such as SAR) and GMTI where minimal latency is essential for operational effectiveness. 40 Gigabit Ethernet on the backplane allows data derived from multiple high resolution sensors to be moved to the processor and then output as meaningful, actionable information in the minimum possible time. Designed for systems deployed in the most challenging environments, the DSP282A delivers up to 665.6 Gigaflops of throughput per card slot as well as supporting advanced 3D graphics. The DSP282A features dual 5th generation Intel Core i7 2.4GHz quad core processors.

For its part, Abaco System likewise has advanced the software side of its HPEC offerings. Last month the company announced AXIS DataView, an extension its AXIS software development environment. DataView allows customers to rapidly develop graphical user interfaces (GUIs) for their embedded applications deployed on Abaco Systems hardware. It's ideal for displaying data and adding controls to signal- and image processing applications as well as any system control or communications application. In-house tests performed by Abaco show that, using DataView, a reduction of over 90 percent in the lines of code required to create a typical signal generator GUI or signal processing GUI is achievable when compared with alternative approaches.

Xeon-D Server-in-a-Box

While many board-level Xeon-D processing products have emerged over the past couple years, rugged box systems are also using the technology. An example is the SB2002-SW "Blackhawk" from General Micro Systems (Figure 2). The system is a prime example of a deployable, rugged, small form-factor server system based on the Intel Xeon-D processor that put data-center processing performance on the battlefield in a non-rackmount solution. The SB2002-SW "Blackhawk" rugged switch/router, which packs up to 16 CPU cores, 20 managed/Ethernet ports, 64 Gbytes of RAM, removable storage, Embedded Services Router software from Cisco, and high-level security into a seven-pound box that operates as low as 75W. According to GMS, future "Server Room in a Box" products will include multiprocessors, image processing, extended storage, and more.

Figure 2
The SB2002-SW “Blackhawk” is a rugged switch/router, which packs up to 16 CPU cores, 20 managed/Ethernet ports, 64 Gbytes of RAM, removable storage, Embedded Services Router software from Cisco, and high-level security features.

As with its previous box-level systems, GMS builds its multi-tier modular designs with a processor tier and an I/O tier, onto which additional processors and I/O modules can be added, and then incorporates storage, accessories, and legacy interfaces. That enabled GMS engineers to quickly introduce the Xeon D-based family, which incorporates the company's RuggedCoolSM system yielding a conduction-cooled, sealed chassis capable of operating at extreme temperatures (-40°C to +85°C) at unthrottled CPU speed.

Kontron's latest system-level HPEC solution, released last Fall, is the StarVX based on the company's VX3058 3U VPX SBC. Leveraging the advanced 8-core version Intel Xeon D-1540 (Broadwell DE), the StarVX packs server-class silicon and highly ruggedized technologies in a compact 3U blade footprint. Based on parallel virtual machine (VM) execution that can leverage operational efficiencies provided by isolated workloads configured to dynamically share common resources, server virtualization is possible outside IT rooms by using platforms such as StarVX. (For more on the StarVX, see Kontron article on p.XX of this issue.)

FPGA Clusters for HPEC

Clever use of FPGAs is another effective way to achieve meet HPEC requirements for military system designers. An example is BittWare's TeraBox-a high-performance FPGA platform ideal for network/packet processing and high performance computing (HPC) applications (Figure 3). Featuring up to eight Xilinx UltraScale FPGAs, the TeraBox offers 44.16 TeraMAC/sec of processing power, up to 4.9 Terabits/sec of memory bandwidth, and up to 3.2 Terabits/sec of I/O - all in a turnkey rackmount solution.

Figure 3
With eight Xilinx UltraScale FPGAs, the TeraBox offers 44.16 TeraMAC/s of processing power, up to 4.9 Terabits/s of memory bandwidth, and up to 3.2 Terabits/sec of I/O all in a turnkey rackmount solution.

The TeraBox system arrives tested and configured, and includes complete development software support with BittWare's BittWorks II Toolkit, allowing users to immediately focus on developing their specific application. The TeraBox features up to eight BittWare PCIe boards based on the Xilinx UltraScale FPGAs. The FPGAs on these PCIe boards provide a system total of up to 18 million logic elements (VU190) and 44,160 DSP slices (KU115).

Achieving Petaflops Performance

While some use the terms high performance computing (HPC) and high performance embedded computing (HPEC) interchangeably, there is subset of demands where the emphasis is on performance over extreme battlefield-levels of raggedness. In the HPC realm, solutions are beyond Teraflop and now into the Petaflops range. Along such lines, late last year One Stop Systems (OSS) introduced the OSS GPUltima Petaflop compute platform in a single rack. The OSS GPUltima supports up to 128 double-wide interconnected accelerators. Consuming only 56 kW of power, the platform uses 94 percent less power than other Petaflop solutions.

The OSS GPUltima employs 64 OSS PCIe Gen3 x16 adapters and cables between the OSS servers and the OSS High Density Compute Accelerators (HDCA), each containing 16 high-performance NVIDIA Tesla K80 GPU accelerators and 32 Mellanox EDR 100Gbs InfiniBand adapters and cables connecting the GPUs through a 36-port InfiniBand switch. One Stop Systems' PCIe expansion systems provide high speed connectivity between the CPU and IO cards. While IO cards have traditionally occupied slots in the server cabinet, OSS designs expansion appliances that support large numbers of high speed cards with latest technology PCIe Gen3 slots, efficient cooling, and sufficient power. Last month One Stop Systems announced that GPUltima product line will employ Bright Computing's HPC Cluster Manager software.

Abaco Systems
Huntsville, AL
(866) 652-2226
www.abaco.com

Curtiss-Wright Defense Solutions
Ashburn, VA
(703) 779-7800
www.cwcdefense.com

General Micro Systems
Rancho Cucamonga, CA
(909) 980-4863
www.gms4sbc.com

Intel
Santa Clara, CA
(408) 765-8080
www.intel.com

Mercury Systems
Chelmsford, MA
(978) 967-1401
www.mrcy.com

One Stop Systems
Escondido, CA
(877) 438-2724
www.onestopsystems.com

 

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