COTS Journal

Riding the Next Wave of Embedded Multicore Processors

By: Peter Carlston, Platform Solutions Architect, Intel

High-performance, low-power military systems will be well served by small form-factor design platforms based on multicore processors and symmetric multiprocessing architectures.

Why are multicore processors becoming pervasive, even in new embedded military system designs? The short answer is a need for more and more performance.

But many wonder why chip manufacturers are not just releasing faster single-core processors. After all, packing more and more, smaller and smaller transistors into a given space, and running them at faster speeds in every generation, has driven exponential increases in performance for the past 30 years. However, connecting the 200,000,000 transistors of a current processor requires thousands of meters of microscopic “wire,” which causes path delays and synchronization difficulties.

In addition, each of those 200,000,000 transistors consumes power and produces heat, and the faster they are clocked the more heat they generate. Leakage current adds to the heat problem, since transistors now measure only three to four atoms wide. In other words, continuing to use single-core processor design methods will eventually result in the processor becoming too hot to cool and internal path delays becoming unworkable.

Since reducing a processor’s frequency and voltage results in a cubic reduction in its overall power requirements, even small speed reductions can make a big difference. Semiconductor manufacturers have recognized, therefore, that the way forward is to build processors that run at somewhat lower frequencies and voltages, but to integrate two or more of these processing cores on a single chip. Path synchronization issues are reduced since the transistor density and length of conducting paths in each core does not increase as fast.

Overall performance increases because dual processing cores can perform two tasks at once. Of course, transistor designs will continue to evolve. For example, dynamic, ultra fine-grained power gating techniques have enabled Intel’s current third-generation multicore processors to achieve impressive performance/watt ratios. Future generations of these multicore processors will use high capacitance process technology to greatly reduce gate leakage current. But from now on, advances in processor capability will derive from advances in multicore processors, not from faster and more complex single-core processors.

Symmetric Multiprocessing Architectures

Using multiple physical processors on the same blade is not new. Many embedded military applications, for example, have used distributed memory and asymmetric multiprocessing (AMP) architectures for some time. Distributed memory designs effectively place two or more independent processors, each with their own private memory, on the same board.

Asymmetric multiprocessing designs use a symmetric multiprocessing (SMP) hardware architecture, but effectively partition the common global memory between processors, making an SMP architecture appear as a distributed memory architecture to the software. These designs assign work to separate processors, each with its own OS and memory partition within the common global memory. The processors may all be located on the same board, but they are basically separate compute systems that communicate among themselves as needed.

Symmetric multiprocessing architectures are fundamentally different. In these designs, a single block of memory is shared among multiple processor chips or among multiple processing cores on the same chip. A single OS image runs across all cores so that work is done in a truly parallel system. SMP operating systems load-balance work between the available cores.

There is a growing tendency for embedded designers to use these architectures in new designs because of their cost, time-to-market and performance advantages, and SMP has long been the dominant multiprocessing architecture for servers. Software development tools for parallelizing applications are mature, and operating systems such as Linux and Windows have long been highly optimized for SMP architectures.

The hardware and software design issues of SMP are therefore well understood by a large pool of experienced engineers, and this experience can be applied directly to developing multicore SMP systems. Military equipment vendors, for example, have already released AMC and VME boards with dual-core SMP processors, and their roadmaps show even broader SMP offerings in the near future.

Likewise, RTOS vendors are releasing SMP versions of their operating systems and tools, so sophisticated SMP operating system choices are growing. These operating systems have been optimized to automatically balance workloads among all of the available processing cores, thereby maximizing performance and efficiency.

Many multicore processors also include large on-chip Layer 2 caches, which enable very fast data transfers between the cores (Figure 1). It is also easier to hide memory and I/O latency when parallel threads work on different parts of data. These types of workloads also benefit from the multitasking capabilities of all modern processors. Combining multitasking with dual-core multiprocessing, for example, often results in performance gains of 170 to 180% for embedded military applications.

Even though modern multitasking processing cores have very low task switch latency, the delay may be too high for demanding, real-time military data acquisition and processing workloads. Multicore SMP architectures can bring compelling performance benefits for these workloads. For example, an application can utilize “core affinity” techniques so that routine processing occurs on one core, but arriving real-time data is processed immediately on the second core, without the task switch latency that a multitasking single-core processor would exhibit. Other applications may benefit from additional SMP techniques such as flow pinning or data pipelining.

Using SMP Architectures in Military Systems

Several tools are available to help software developers make the switch to SMP designs. For example, Intel’s VTune Performance Analyzer, Thread Profiler, Thread Checker and Fortran and C compilers have proven their worth in multitudes of development projects.

Symmetric multiprocessing is suited to many multitasking applications used in today’s military systems. Shipboard, ground mobile and airborne systems, such as Unmanned Aerial Vehicles (UAVs), are being designed using multiple, concurrent tasks, which allows more software reuse and better modular designs. Industry standard communications protocols such as Socket and IP traffic simplify task communication. Machines based on SMP architectures are ideal for running multiple components simultaneously. For example, data acquisition, signal processing, telemetry, operator display and control may all be treated as separate tasks when running in an SMP environment.

On a UAV, for example, SMP enables data acquisition, processing and telemetry to be handled as independent tasks. Rugged, embedded boards—such as the dual-core Intel Core Duo processor-based Curtiss-Wright 1201 3U CompactPCI SBC—provide a small form-factor, lightweight SMP processing platform well suited to special requirements of UAVs (Figure 2). Such rugged, multicore SMP boards are well suited for the harsh environments in which UAVs operate, ranging from the extreme heat of a desert runway to sub-zero temperatures when flying above 25,000 feet, as well as constant vibration and large g-shocks during weapon firings and landings.

A strong emphasis is nowv being place on next-generation military systems to support a Windows operating system environment to simplify and speed up training for new troops. This trend is helping multicore SMP SBCs find homes in military vehicles where server-class performance is desirable to manage vehicle cargo, maintenance records, parts databases and documentation, as well as provide tracking information to battle commanders.

With the growing demand for performance driving an increased use of SMP architectures, multicore processors offer a good way forward for the computing industry as a whole. For embedded military applications, multicore processors such as the Intel Core Duo are proving well suited for high-performance, low-power systems.

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